1. Field of the invention
The present invention relates to balanced amplifiers, i.e. fully differential amplifiers, and the techniques for controlling the common mode voltage.
2. Discussion of the prior art
A fully differential or balanced amplifier is represented by a four terminal amplifying block, two input terminals (the inverting and the noninverting input, respectively) and two output terminals (the positive and the negative output, respectively).
A characteristic of these amplifiers is that the usable-output voltage is not the voltage of a single output terminal with reference to a common potential node of the circuit, but the potential difference between the two output terminals. Although the value of the voltage between each output terminal and the circuit ground is not significant in relation to the useful output signal of the amplifier, such a voltage is all the same subject to certain restraints, often rather stringent, in order to ensure correct operation of the whole circuit. In fact, an anomalously different value from the design value of the voltages toward ground of the two output terminals of an amplifier may compromise the correct biasing of the input devices of a following stage as well as the correct biasing of the output transistors of the amplifier.
The terms of the problem may be better understood by referring to FIG. 1, wherein a most elementary type of balanced amplifier made with CMOS devices is depicted. The amplifier is formed by a pair of input transistors N1 and N2, by three current generators formed by transistors P1, P2 and by the transistor N3, respectively. The gates of the input transistors constitute the two input terminals IN+ and IN- of the differential amplifier and the drains of the same transistors constitute the respective nodes or output terminals OUT- and OUT+. A network for controlling the biasing currents of the differential input pair of transistors N1 and N2 is formed by two diode connected transistors P3 and N4 and by the control resistor Rp. The operation of the circuit is of immediate comprehension by a skilled technician and hardly requires further explanations. In such an amplifier the input voltage will be: EQU Vi=Vin+-Vin-
while the output voltage will be: EQU Vout=Vout+-Vout-
it is defined as "input common mode voltage": EQU Vcmi=1/2(Vin++Vin-)
and it is defined as "output common mode voltage": EQU Vcmo=1/2(Vout++Vout-).
In order for the amplifier of FIG. 1 to work and be able to drive a similar following amplifier stage, it is necessary for the Vcmo to be within a voltage range, the limits of which depend upon the desired output signal swing and other parameters, which are often tied to the fabrication technology of the semiconductor devices (e.g. the threshold voltages of transistors) as well as the supply voltage (Vs) of the circuit.
A correct operation of the amplifier is ensured when all transistors operate within the so-called "saturation zone". In this case the amplifier's circuit of FIG. 1 may be schematically depicted, in terms of the output common mode voltage, as shown in the circuit diagram of FIG. 2, wherein the transistors used as current generators are represented by means of the relative current generator symbol and the presence of a resistor R signifies the non-ideal reality of current generators (finite impedance) and the consequent channel modulation effect of the transistors forming the differential amplifier.
It is evident that: EQU Vcmo=R(I1+I2-I3).
It would appear simple to determine a suitable value of the output common mode voltage of the amplifier (Vcmo) by controlling the value of the resistor R and the values of the currents I1, I2 and I3.
In practice this is not possible because R is hard to control in a sufficiently precise manner; and in any case, the value of such a resistance R must be rather high in order to obtain a sufficiently high differential gain. The currents I1 and I2 (the two respective current generators) must be as identical as possible in order to reduce the "offset" voltage of the amplifier. In practice, the parameter which would appear simpler to act on is the value of the current I3, which is also hard to control with sufficient precision to ensure a desired value of the output common mode voltage Vcmo.
It is therefore common to adjust the value of the Vcmo by additional circuit means which essentially consist of feedback loops, commonly referred to as "common mode feedbacks". Such an output common mode voltage control loop of the amplifier may be implemented within the integrated amplifier itself or by external means, but in any case the problem of discriminating the common mode signal from the differential signal exists. This discriminating problem especially when the dynamic range of the output signal is of the same order of the Vcmo, may cause other problems such as, for example, a transfer of the differential signal on the common mode signal, as will be described later.
A classic solution of the problem is depicted in FIG. 3. The balanced amplifier, the output common mode voltage of which must be controlled, is indicated by the symbol A. The output common mode voltage control loop is formed by a single-ended operational amplifier, indicated by the symbol OP, connected in a summing network, which comprises the resistances R1, R2 and R3, and capable of generating an output voltage (commonly referred to as an error signal) which is proportional to: EQU Vout++Vout--Vcm*
where Vcm* is the desired design value of the output common mode voltage Vcmo of the amplifier. Such an output voltage of the OP amplifier is used, according to techniques known to the skilled technician, by applying it to a dedicated Vcmc terminal of the balanced amplifier (output common mode control terminal) in order to control the value of the current I3, or of the currents I1 and I2 (FIG. 2), in such a way as to keep the Vcmo of the fully differential amplifier A within a correct range set by such a reference voltage Vcm*. This type of solution is hardly convenient because it utilizes resistors, i.e. components which when made in CMOS technology generally have a large area requirement and become the source of non-linearity phenomena thereby causing a "contamination" by the differential mode of the common mode. Furthermore, such a solution is only applicable to amplifiers having an output impedance sufficiently low to drive such resistors, which is not always possible in case of amplifiers intended for operation in switched capacitor type circuits which often have a high output impedance and a limited ability to deliver current. In any case such a solution is often difficult to implement and is remarkably complicated.
A second known solution, which does not require the utilization of resistors, uses a three input operational amplifier(OP), as depicted in FIG. 4. Two of the three inputs of the feedback amplifier OP sum the Vout+ and Vout- signals, while the third input acts differentially in respect to the other inputs by comparing these inputs with a reference voltage Vcm*. This solution, though not using resistors, uses a circuit which, although avoiding sensibly loading the stage to which it is applied (i.e. the balanced amplifier A), again presents the problem of contamination between the differential mode and the common mode, although avoiding sensibly loading the stage to which it is applied (i.e. the balanced amplifier A). Moreover, the design of such a three input amplifier OP may entail remarkable problems because the input stage transistors of such a three input amplifier sum the signals applied to the input terminals under a bias condition which does not easily permit an exact cancellation of the positive signal by the negative signal.
A third known solution, which is conceptually similar to the first described in FIG. 3, is depicted in FIG. 5. The summing network of resistors is substituted with an analog summing network of switched capacitors (S.C.); and furthermore, by utilizing two identical networks on both "channels" of the balanced amplifier A, it is possible to completely eliminate the requirement of an auxiliary operational amplifier for stabilization by accepting a further increase of the capacitive load of the balanced amplifier A. In many circuit situations such a solution may present a common mode "offset" voltage which is rather high with respect to the desired value Vcm*.
On the other hand, most often such balanced (fully differential) amplifiers are used in cascade, the chain of the balanced amplifiers comprising at least two but more commonly a rather large number of cascaded amplifiers, as for example in the case of switched capacitor integrator chains. In this instance the problem of controlling the output common mode voltage is manifolded.